Safe Reasoning with Logic LTS

Previous work has introduced the setting of Logic LTS, to-gether with a variant of ready simulation as fully-abstract refinementpreorder, which allows one to compose operational specifications using aCSP-style parallel operator as well as the propositional connectives con-junction and disjunction. In this paper, we show how a temporal logicfor specifying safety properties may be embedded into Logic LTS so that(a) the temporal operators are compositional for ready simulation and(b) ready simulation, when restricted to pairs of processes and formulas,coincides with the logic’s satisfaction relation. The utility of this set-ting as a semantic foundation for mixed operational and temporal-logicspecification languages is demonstrated via a simple example.